Abdullah YILDIZ
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Abdullah YILDIZ

Design and Verification Engineering Team Member at Yonga Technology Microelectronics R&D & Team Member at RESysLab

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Articles

Mead & Conway revolution
FPGA vs CPU vs GPU vs Microcontroller: How Do They Fit into the Processing Jigsaw Puzzle?
Microprocessor Evaluation (1971-1996)
Proprietary Versus Open Instruction Sets
ISA Wars: Understanding the Relevance of ISA being RISC or CISC to Performance, Power, and Energy on Modern Architectures
THE AMAZING $1 MICROCONTROLLER
An Open Letter to Intel by Andrew S. Tanenbaum
Meltdown and Spectre
WHY RASPBERRY PI ISN’T VULNERABLE TO SPECTRE OR MELTDOWN
Infographics: Operation Costs in CPU Clock Cycles
RISC instruction sets I have known and disliked
Digital FOSSils: A History of Free and Open Source Silicon

Articles on Digital Design

The Ten Commandments of Excellent Design from Peter Chambers
Excellent Tutorial on Latches and Flip-Flops from Enoch Hwang, Ph.D.
Understanding the Basics of Setup and Hold Time
ASAP and ALAP scheduling
Cliff Cummings’ Award-Winning Verilog & SystemVerilog Papers
Arbiters: Design Ideas and Coding Styles
Taking a New Look at Verilator
Under the hood of Formal Verification
HDL Coding styles
Verilog Coding Standard
Chisel Learning Journey
Fixed Point Numbers in Verilog
Designing A Skid Buffer

Articles on Programmable Logic

Beginner’s Guide to Understanding FPGA Development
Three Ages of FPGAs: A Retrospective on the First Thirty Years of FPGA Technology
FPGAs vs ASICs
Creating Embedded Microcontrollers (Programmable State Machines)
10 FPGA Design Techniques You Should Know
10 Techniques for Creating Reliable FPGA Designs
How to Implement State Machines in Your FPGA
Time-borrowing in programmable UltraScale+ leaf clock buffers boosts Fmax 5.5% on average, perhaps by » 10%
FPGA Resources at GateForge Consulting Ltd.
Controlling Timing within an FPGA
Breaking all the rules to create an arbitrary clock signal
Using the Clock Period Constraint to Your Advantage
How Do I Reset My FPGA?
How to Build a Self-Checking Testbench
TPM2137: RE challenge for WCTF2019, showcasing entry level FPGA bitstream reverse engineering

Articles on Embedded Systems, Operating Systems, and Programming

Baking Pi - Operating Systems Development
OSDev.org
Behind the process
What every systems programmer should know about concurrency by Matt Kline
THE BASICS AND PITFALLS OF POINTERS IN C
WHEN 4 + 1 EQUALS 8: AN ADVANCED TAKE ON POINTERS IN C
How to Use C’s volatile Keyword
EMBED WITH ELLIOT: THE VOLATILE KEYWORD
EMBED WITH ELLIOT: THE STATIC KEYWORD YOU DON’T FULLY UNDERSTAND
5 Tips for Designing a Smart Watchdog
7 Steps to Create a Stack Monitor
Linked List Problems
Step-by-Step into Argp

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